AMD Unveils Upcoming GPU Roadmap – Capsaicin

Even as Polaris approaches us quickly within 3 months, the planning for its successor has long been in the works. At their Capsaicin event, AMD took off the wraps for their upcoming GPU plans with a roadmap detailing the planned releases up till 2019. In keeping with the star nomenclature that started with Polaris and ditching the islands, we will have Vega and then Navi following Polaris.

Starting off with Polaris later this year, AMD’s main selling point it seems is the 2.5x performance per watt the new GCN architecture will bring. This is no doubt due to the combination of improved hardware itself, the new 14nm LPP process and DX12 finally making use of the previously wasted hardware resources like asynchronous controllers and shaders.

Moving along, we have Vega to release in what looks to be early 2017. The biggest change it seems is the use of HBM2, replacing GDDR5(X) and HBM1 no doubt. This means we can no doubt expected all Vega releases to utilize HBM2. While this may suggest Polaris won’t be using HBM2, it could also mean that only certain Polaris chips, likely only the high-end ones, will use HBM2.

Finally, we come to Navi, which should debut in early 2018. This release will have scalability and use of next-gen memory like Hyper-Memory Cube for instance. The scalability mention suggests either the use of smaller GCN units used to build the chip to better suit the market or a new process node. For now, we are probably better off trying to figure out what Polaris will be

Nvidia Volta to Power Supercomputers in 2017 – Consumer Cards in 2018

While Nvidia’s Pascal is set to launch next year, the graphics company is already setting it’s sights on their next architecture. Codenamed Volta, the Pascal replacement is set to launch sometime in 2018 for the consumer market. For the much more lucrative supercomputer market though, Nvidia is debuting the architecture one year earlier, in 2017. Volta would mark the sixth unified shader architecture to be released by Nvidia.

Volta was originally meant to used HMC or Hybrid Memory Cube as a GDDR5 replacement. That didn’t pan out as HMC suffered delays. This led to Pascal debuting with HBM, with High Bandwidth Memory as a stand in. HMC is finally showing some progress as Micron finally starts rolling with production. Despite this, supply will still short which is probably why Nvidia is choosing to launch first with supercomputers.

Another reason is Nvidia also wants to milk Pascal as much as possible. If Volta were to launch the same year for consumers as supercomputers, Pascal would only have a very short 1-year cycle, making it hard to recoup R&D costs. With Pascal being the scapegoat as well with HBM, Nvidia should be able to learn some lessons for HMC which is relatively more complex. Volta will also utilize the NVLINK GPU interconnect set to debut with Pascal.

Thank you WCCFTech for providing us with this information

Intel Reveals Details Regarding Intel’s “Knights Landing” Xeon Phi Coprocessor

Intel has announcement the ‘Knights Landing’ Xeon Phi Coprocessor late last year, having released very few details about the lineup back then. As time passes, details are bound to be revealed and Intel is said to start shipping the series next year. This is why Intel apparently has decided to reveal some more details regarding the ‘Knights Landing’ Xeon Phi Coprocessor.

The announcement from last year points to the Knights Landing taking the jump from Intel’s enhanced Premium 1 P54C x86 cores and moving on to the more modern Silvermont x86 cores, significantly increasing the single threaded performance. Furthermore, the cores are said to incorporate AVX units, allowing AVX-512F operations and provide bulk Knight Landing’s compute power.

Intel is said to offer 72 cores in Knight Landing CPUs, with double-precision FP63 performance expected to reach 3 TFLOPS, having the CPUs boasting the 14nm technology. While this is somewhat old news, Intel revealed some more insights at the ISC 2014.

During the conference, Intel stated that the company is required to change the 512-bits and GDDR5 memory present in the current Knights Corner series. This is why Intel and Micron have apparently struck a deal to work on a more advanced memory variant of Hybrid Memory Cube (HMC) with increased bandwidth.

Also, Intel and Micron are said to be working on a Multi-Channel DRAM (MCDRAM) specially designed for Intel’s processors, having a custom interface best suited for Knights Landing. This is said to help scale its memory support up to 16 GB if RAM while offering up to 500 GB/s memory bandwidth, a 50% increased compared to Knights Corner’s GDDR5.

The second change made to Knights Landing is said to include replacing the True Scale Fabric with Omni Scale Fabric in order to offer better performance compared to the current fabric solution. Though Intel is currently keeping this information on a down-low, traditional Xeon processors are said to benefit from this fabric change in the future as well.

Lastly, compared to Intel’s Knights Corner series, the Knights landing will be available both in PCIe and socketed form factor, mainly thanks to the MCDRAM technology. This is said to allow the CPU to be installed alongside Xeon processors on specific motherboards. The company has also emphasised that the Knights Landing version will be able to communicate directly with other CPUs with the help of Quick Patch Interconnect, compared to current PCIe interface.

In addition to the latter, having the Knights Landing socketed would also allow it to benefit from the Xeon’s NUMA capabilities, being able to share memory and memory spaces with the Xeon CPUs. Also, Knights Landing is said to be binary compatible with Haswell CPUs, having the company considering writing programs once and running them across both types of processors.

Intel is expected to start shipping the Knights Landing Xeon Psi Coprocessor somewhere around Q2 2015, having the company already lining up its first Knights Landing supercomputer deals with National Energy Research Scientific Computing Center with around 9300 Knights Landing nodes.

Thank you Anandtech for providing us with this information
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