AMD Leaks Exascale Heterogeneous Processor Through IEEE Filings

In a paper to the IEEE (Institute of Electrical and Electronics Engineer), AMD has revealed the existence of their Exascale Heterogeneous Processor or EHP. Pretty much a massive APU, the EHP will combine a massive 32 Zen cores with a Greenland graphics portion and up to 32GB of HBM2, all on top of a 2.5D interposer. Unlike the Fiji GPUs, the EHP will also be connected to more NVRAM (Non-Volatile RAM) with the HBM acting more like a fast cache.

At this point, it is difficult to determine if this massive EHP would actually become a product or not due to the huge complexity of the chip. At 32 CPU cores along with what appears to a be a massive GPU portion for the APU itself, that chip would push the very limits of what is possible. The largest announced Zen CPU is a 16 core variant though higher core counts might be made for the enterprise segment. However, the enterprise segment has generally used separate GPUs when needed. I suppose this is where HSA comes in, with GPU cores being turned to general processing tasks.

As expected, given the complexity of the EHP, a silicon interposer is used to link the HBM modules to the APU. A chip that integrated everything would likely be beyond our current technical ability. It’s interesting that AMD has decided to still fuse the massive CPU and GPU together as a silicon interposer could let the CPU and GPU dies be made separately and still communicate with each other almost as if they were on the same chip, though that could impact HSA.

If this EHP does come to fruition, AMD is likely hoping the combination of HBM, HSA, 16nm and Zen will allow them to take a stab back at the much more lucrative enterprise segment. The EHP may be just the answer AMD needs to combat Intel’s Xeon and Xeon Phi as well as Nvidia Tesla’s; it will be interesting to see how the market will react to these massive EHPs and HSA.

Thank you WCCFTech for providing us with this information