AMD has been leaking slides like a sieve before their 2015 Financial Analyst Day. This latest slide sheds even more light on how the Zen cores, detailed earlier, will all fit together to form a CPU. With some rumours pointing to as many as 16 cores, a 4 core unit is more interesting as it’s unlikely that most users will want that many cores, even if they can get their hands on them. There is a little hint that suggests there will be units greater than 4 cores as the slide mentions that “multiple units can be combined for even greater performance”. Whether that means up to 16 cores remains to be seen.
As expected, the cores share a large pool of L3 cache. At 8MB, that’s pretty much expected for a quad core unit as AMD currently uses that much in their 4M/8C CPUs and even Intel hovers about 6-8MB for their quad cores as well. In terms of L2 cache, the same old size since K10 of 512KB per core remains. Most intriguing is that Zen moves to an inclusive cache design. While AMD has already dropped the exclusive cache found in K7/8/10, even Bulldozer kept some level of cache exclusive. More mundane is the mention of a high-speed interconnect to tie all the cores together.
While this new slide doesn’t share a lot of new information, it does shed new light on Zen the clarify some important points. May 6th may prove a very important day for both AMD and the PC industry as a whole.